Welcome to the Department of Electrical and Computer Engineering, Cadence North American University Software Program at Portland State University. This material and the references within are a first-line source of information about the Cadence design tools extensively used in classes and research programs in the Electrical and Computer Engineering Department. Classes and research span custom transistor level digital and analog design, floorplanning, placement and route as well as statistical modeling of process corners, yield and manufacturability.
Cadence startup tar file is located in ECE x25 and PSU courses.
Simple Tutorials from other VLSI Cadence/University Programs
University of Washington have developed a set of tutorials that step a novice user through the process of creating and verifying a layout. The tutorials take the user through the following steps:
Worchester Polytecnical The aim of the laboratory is to provide a comprehensive design environment for the development of novel integrated circuit and VLSI architectures, and to facilitate hands-on education of undergraduate and graduate students in all aspects of IC design.
Virgina Tech following tutorials show setup files, basic features and simple examples of Cadence tools for VLSI design.
Information is provided "as is" without warranty of any kind. Please follow the link to read the
Information is provided "as is" without warranty of any kind. Anyone may use information available from this web-site and all use of the information gathered from this web-site is at the user’s own risk. Before using the provided materials on any data create data backups within the user environment. Creating backups and the backup frequency are user responsibilities. It is the user’s responsibility is to understand what each distributed component does. Keep data backups intact. Delete backups at own risk and only when satisfied with results.